View on GitHub ROCm_Logo

ROCm, A New Era in Open GPU Computing

Platform for GPU Enabled HPC and UltraScale Computing

ROC ON, Float16 and Integer16 support in AMD GPUs

It has been a secret for too long. AMD GPUs do support Float16 and Int16 instructions. The current GPUs execute at same speed as Float32.

We will also expose our GCN 3 ISA via assembler directly support by compiler. The new LLVM Native GCN ISA compiler supports a disassembler, assembler and soon inline-assembly so you be able tune your code even further.  

ROCm Compilers will be bring full richness of FLOAT16 and Int16 via HCC, HIP and OpenCL.

You can find out more on Float16 and other instruction in the GCN version 3 ISA manual

+ +

Here are examples of some of the instructions supported:

+

Also the GCN 3 Architecture supports 32-bit, 24-bit, and 16-bit integer math.