low.scf.for
← low dialect
Bounded counted target-low loop with optional loop-carried register state.
Operation contract
| Property |
Value |
| Semantic phase |
executable |
| Traits |
ImplicitTerminator(low.scf.yield), StorageRelation |
| Interfaces |
LoopLike |
Signature
| Kind |
Name |
Type |
Cardinality |
Description |
| Operand |
lower_bound |
register |
required |
Inclusive lower bound register. |
| Operand |
upper_bound |
register |
required |
Exclusive upper bound register. |
| Operand |
step |
register |
required |
Positive step register. |
| Operand |
iter_args |
register |
variadic |
Initial loop-carried register values. |
| Operand |
unroll_factor |
register |
optional |
Optional dynamic target-domain unroll factor. |
| Result |
results |
register |
variadic |
— |
| Attribute |
unroll_policy |
enum LowScfForUnrollPolicy |
optional |
Optional bare unroll policy for required full unroll. |
| Region |
body |
region |
required |
Loop body. Terminated by low.scf.yield. (single block, terminator low.scf.yield.) |
Verification constraints
SameType(lower_bound, upper_bound)
SameType(lower_bound, step)
IterArgsMatchResults(iter_args, results)
BlockArgsSatisfy(body)
YieldCountMatchesResults(body, results)
YieldTypesMatchResults(body, results)
Examples
low.scf.for [%lo to %hi step %step] do(%iv: reg<amdgpu.sgpr x1>) {
low.scf.yield
}
%result = low.scf.for [%lo to %hi step %step] iter_args(%acc0: reg<amdgpu.vgpr x1>) -> (reg<amdgpu.vgpr x1>) do(%iv: reg<amdgpu.sgpr x1>, %acc: reg<amdgpu.vgpr x1>) {
low.scf.yield %acc : reg<amdgpu.vgpr x1>
}