low.scf.while
← low dialect
Condition-controlled target-low loop with explicit condition and body regions. Initial registers and low.scf.yield define the condition-region header tuple. low.scf.condition defines an independent body/result tuple: its forwarded registers enter the body on the true edge and become loop results on the false edge. The tuples may differ in count and register type, and either tuple may be empty.
Operation contract
| Property |
Value |
| Semantic phase |
executable |
| Traits |
StorageRelation |
| Interfaces |
LoopLike |
Signature
| Kind |
Name |
Type |
Cardinality |
Description |
| Operand |
iter_args |
register |
variadic |
Initial registers for the condition-region header tuple. |
| Result |
results |
register |
variadic |
Registers forwarded by the final false low.scf.condition edge. |
| Region |
before |
region |
required |
Runs before each condition check. Its arguments are initialized by iter_args and updated by low.scf.yield. Terminated by low.scf.condition. (single block, terminator low.scf.condition.) |
| Region |
after |
region |
required |
Runs while the condition is true. Its arguments are the registers forwarded by low.scf.condition. Terminated by low.scf.yield, whose values update the condition-region arguments. (single block, terminator low.scf.yield.) |
Verification constraints
ConditionForwardedCountMatchesBlockArgs(before, after, results)
ConditionForwardedTypesMatchBlockArgs(before, after, results)
YieldCountMatches(after, before)
YieldTypesMatch(after, before)
Examples
low.scf.while {
low.scf.condition %condition : reg<spirv.id : i1>
} do {
low.scf.yield
}
%terminal, %candidate = low.scf.while(%before = %initial : reg<spirv.id : i32>) -> (reg<spirv.id : i32>, reg<spirv.id : i32>) {
%next = OpIAdd %before, %one
%keep_going = OpULessThan %next, %limit
low.scf.condition %keep_going, %before, %next : reg<spirv.id : i1>, reg<spirv.id : i32>, reg<spirv.id : i32>
} do(%body_state: reg<spirv.id : i32>, %body_candidate: reg<spirv.id : i32>) {
low.scf.yield %body_candidate : reg<spirv.id : i32>
}