low.slice
← low dialect
Project a contiguous subrange from a register-range value.
Operation contract
| Property |
Value |
| Semantic phase |
— |
| Traits |
Pure, StorageRelation |
Signature
| Kind |
Name |
Type |
Cardinality |
Description |
| Operand |
source |
register |
required |
— |
| Result |
result |
register |
required |
— |
| Attribute |
offset |
i64 |
required |
— |
Verification constraints
SameRegisterClass(source, result)
Examples
%lane = low.slice %quad[2] : reg<amdgpu.vgpr x4> -> reg<amdgpu.vgpr>
%pair = low.slice %quad[1] : reg<amdgpu.vgpr x4> -> reg<amdgpu.vgpr x2>