vector.dot2f
← vector dialect
Group adjacent two-lane f16 or bf16 products along the last axis and add each two-product fused sum into an f32 accumulator lane. Semantics are equivalent to extending each source lane to f32, then accumulating scalar.fmaf(lhs0_f32, rhs0_f32, acc) followed by scalar.fmaf(lhs1_f32, rhs1_f32, partial) for each result lane. This models AMDGPU fdot2-style widened register dots without making f16 dot accumulation implicit in vector.dotf.
Operation contract
| Property |
Value |
| Semantic phase |
executable |
| Traits |
Pure |
Signature
| Kind |
Name |
Type |
Cardinality |
Description |
| Operand |
lhs |
vector |
required |
f16 or bf16 source lanes grouped in pairs along the last axis. |
| Operand |
rhs |
vector |
required |
f16 or bf16 source lanes grouped in pairs along the last axis. |
| Operand |
acc |
vector |
required |
f32 accumulator lanes updated by each two-lane dot product. |
| Result |
result |
vector |
required |
Updated f32 accumulator lanes. |
Verification constraints
HasF16OrBf16Element(lhs)HasF16OrBf16Element(rhs)HasF32Element(acc)SameShape(lhs, rhs)SameElementType(lhs, rhs)SameType(acc, result)LastAxisGroupedBy(lhs, result)
Examples
%r = vector.dot2f %lhs, %rhs, %acc : vector<16xf16>, vector<16xf16>, vector<8xf32>
%r = vector.dot2f %lhs, %rhs, %acc : vector<2x16xbf16>, vector<2x16xbf16>, vector<2x8xf32>