vector.dot8i4
← vector dialect
Treat each i32 source lane as a little-endian pack of eight 4-bit integer fields, multiply corresponding packed fields using the signedness template, and add the eight-product sum into the matching i32 accumulator lane. This is a packed-storage register dot: use vector.bitpack<4> when starting from unpacked byte lanes. The semantics match AMDGPU sdot8/udot8/sudot8 with clamp disabled.
Operation contract
| Property |
Value |
| Semantic phase |
executable |
| Traits |
Pure |
Signature
| Kind |
Name |
Type |
Cardinality |
Description |
| Operand |
lhs |
vector |
required |
i32 lanes holding packed lhs 4-bit fields. |
| Operand |
rhs |
vector |
required |
i32 lanes holding packed rhs 4-bit fields. |
| Operand |
acc |
vector |
required |
i32 accumulator lanes updated by each packed eight-lane dot product. |
| Result |
result |
vector |
required |
Updated i32 accumulator lanes. |
| Attribute |
kind |
enum IntegerDot8I4Kind |
required |
— |
Verification constraints
HasI32Element(lhs)SameType(lhs, rhs, acc, result)
Examples
%r = vector.dot8i4<s4s4> %lhs, %rhs, %acc : vector<4xi32>
%r = vector.dot8i4<u4s4> %lhs, %rhs, %acc : vector<[%N]xi32>