Welcome to the Omniperf Documentation!
Warning
This version of the documentation is archived and contains out-of-date information. See Omniperf documentation for the latest version.
Table of Contents
- Introduction
- High Level Design
- Deployment
- Getting Started
- Profile Mode
- Analyze Mode
- AMD Instinct™ MI Series Accelerator Performance Model
- Definitions
- Profiling with Omniperf by Example
- VALU Arithmetic Instruction Mix
- Infinity-Fabric™ transactions
- Experiment #1 - Coarse-grained, accelerator-local HBM reads
- Experiment #2 - Fine-grained, accelerator-local HBM reads
- Experiment #3 - Fine-grained, remote-accelerator HBM reads
- Experiment #4 - Fine-grained, CPU-DRAM reads
- Experiment #5 - Coarse-grained, CPU-DRAM reads
- Experiment #6 - Fine-grained, CPU-DRAM writes
- Experiment #7 - Fine-grained, CPU-DRAM atomicAdd
- Vector memory operation counting
- Instructions-per-cycle and Utilizations example
- LDS Examples
- Occupancy Limiters Example
- FAQ